This guide covers what Gerber data is and which format to use (POINT 01), the complete required and recommended file set (POINT 02), the four most common data problems and how to prevent them (POINT 03), a pre-submission self-check and folder structure (POINT 04), and everything your fabrication note needs to include (POINT 05).
Gerber data is the digital representation of a PCB's manufacturing information. Each layer of the board — copper patterns, soldermask, silkscreen, drill locations, board outline — is exported as a separate file in a standardised format that PCB manufacturers worldwide can read and load directly into their CAM (Computer-Aided Manufacturing) software.
There are two main formats in active use today:
Recommended
Gerber X2
The current IPC standard. Each file contains embedded metadata that identifies its layer function — top copper, bottom soldermask, board outline, and so on — so the manufacturer's CAM system can assign layers automatically without human interpretation.
Reduces layer misassignment risk. Supported by KiCad, Altium, Eagle, OrCAD, and most modern EDA tools. Recommended for all new designs.
Legacy — still widely accepted
RS-274X (Extended Gerber)
The traditional format, in use since the 1990s. Files contain the layer image data but no embedded layer identification — the manufacturer must match files to layers based on filenames, extensions, or a separate layer map document.
Accepted by virtually all PCB manufacturers globally. If using RS-274X, descriptive filenames and a layer map document are essential.
Practical recommendation: Export in Gerber X2 if your EDA tool supports it. If your manufacturer or a legacy workflow requires RS-274X, that is fine — just ensure every file has a descriptive name and include a layer map. For drill data, Excellon format is the universal standard regardless of which Gerber format you use.
Every file in the table below serves a specific function in the manufacturing process. Missing even one required file typically causes a full hold on the order until the missing data is supplied.
| File / Layer REQUIRED |
Description |
Typical filename example |
| Top Copper | Outer copper pattern, component side | TopCopper.gbr / .GTL |
| Inner Layer(s) | One file per inner copper layer | InnerLayer2.gbr / .G2 |
| Bottom Copper | Outer copper pattern, solder side | BottomCopper.gbr / .GBL |
| Top Soldermask | Soldermask openings, component side | TopSoldermask.gbr / .GTS |
| Bottom Soldermask | Soldermask openings, solder side | BottomSoldermask.gbr / .GBS |
| Top Silkscreen | Component designators and markings | TopSilkscreen.gbr / .GTO |
| Bottom Silkscreen | If used on solder side | BottomSilkscreen.gbr / .GBO |
| Top Solder Paste | SMT paste apertures, component side | TopPaste.gbr / .GTP |
| Bottom Solder Paste | SMT paste apertures, solder side | BottomPaste.gbr / .GBP |
| Drill Data | Through-hole and via drill positions (Excellon) | DrillPlated.drl / .DRL |
| Board Outline | Closed-path board perimeter | BoardOutline.gbr / .GKO |
Recommended Supporting Files
These files are not strictly required to start manufacturing but significantly reduce the number of clarification questions the manufacturer will ask — and therefore reduce delays.
| Document RECOMMENDED |
What it covers |
| Stackup drawing | Layer sequence, dielectric thicknesses, copper weights, finished board thickness and tolerance, prepreg specification |
| Drill chart | All hole diameters, counts, plated vs non-plated, tolerances |
| Fabrication note | Material, surface finish, IPC class, electrical test method, special requirements (see POINT 05 for full list) |
| Panelisation drawing | Required if you specify a panel layout; otherwise the manufacturer will panel at their discretion |
| Layer map / README | Filename-to-layer cross-reference; essential when using RS-274X format |
Most data-related rejections trace back to the same four issues. Understanding what causes each one — and how to prevent it — eliminates the majority of submission failures.
🏷️PROBLEM 01Layer identification failure
When filenames are generic — Layer1.gbr, Layer2.gbr, File03.gbr — the manufacturer cannot determine which file maps to which physical layer without asking. This is not a minor inconvenience: layer misassignment will cause the wrong copper pattern to be etched on the wrong side, which is catastrophic and may not be caught until after boards are delivered.
Fix: Use descriptive filenames for every file — TopCopper.gbr, BottomSoldermask.gbr, InnerLayer3.gbr. With Gerber X2, layer metadata is embedded and naming matters less, but clear names are still good practice. Always include a README or layer map that explicitly maps each filename to its layer function.
📐PROBLEM 02Drill data unit mismatch
Drill data and Gerber files must use the same unit system — both metric (mm) or both imperial (inches). If they differ, drill positions will be offset by a scale factor from the copper pads, making every hole misplaced. This is one of the most visually striking failures when viewed in a Gerber viewer, yet it is still a common submission error.
Fix: Confirm your EDA export settings use consistent units across all outputs. After exporting, open both the Gerber files and the drill file simultaneously in a viewer and verify that drill holes land exactly on pad centres. If they do not, the unit setting is almost certainly the cause.
⬜PROBLEM 03Missing or incomplete board outline
The board outline is sometimes omitted entirely, or it exists only on a mechanical or silkscreen layer without being exported as a standalone Gerber file. Without a board outline, the manufacturer does not know the external dimensions of the board and cannot set up the routing process. Some manufacturers will send the order back; others may estimate dimensions from the copper extents and cut incorrectly.
Fix: Export the board outline as a dedicated Gerber file. Name it clearly: BoardOutline.gbr or Outline.gbr. The outline must be a fully closed path — open ends or gaps will cause problems with automated DRC. Check that the outline layer is visible and correctly positioned in your Gerber viewer before submitting.
🔩PROBLEM 04Insufficient blind/buried via specification
Standard drill files only communicate hole diameter and location. For multilayer boards with blind or buried vias, the drill file alone does not specify which layer pair each via connects — for example, whether a blind via spans from top copper to layer 2, or from layer 2 to layer 4. Without this information, the manufacturer cannot correctly plan the sequential lamination process.
Fix: Export separate drill files for each via type and layer pair. Label them explicitly: Drill_BlindTop-L2.drl, Drill_BuriedL2-L3.drl. Document the via structure clearly in the stackup drawing, labelling each blind and buried via span with start and end layer numbers.
Self-Check with a Gerber Viewer
Before submitting to the manufacturer, open all files in a Gerber viewer and verify each item in this checklist. Free options include KiCad's Gerber Viewer, gerbv, and several web-based viewers. Spending five minutes on this review eliminates the most common causes of rejection.
All layers render correctly with no missing or blank files
Layer-to-layer registration is accurate — pads on adjacent layers align
Drill holes land on pad centres on all layers
Board outline is present, fully closed (no open ends or gaps), and does not extend beyond the copper/component extents
No extraneous data appears in production layers — design notes, dimension annotations, and reference geometry should be on non-production layers only
Soldermask openings match pad locations and have appropriate clearance
Silkscreen does not overlap soldermask openings (causes adhesion issues)
Recommended Folder Structure
Organise all files into a structured folder before compressing into a single ZIP archive. This makes the manufacturer's CAM review faster and reduces the chance of files being overlooked.
YourBoardName_Rev1.0/
├── README.txt ← Layer map + revision note
├── Gerber/
├── TopCopper.gbr
├── InnerLayer2.gbr
├── InnerLayer3.gbr
├── BottomCopper.gbr
├── TopSoldermask.gbr
├── BottomSoldermask.gbr
├── TopSilkscreen.gbr
├── TopPaste.gbr
└── BoardOutline.gbr
├── Drill/
├── DrillPlated.drl
└── DrillNonPlated.drl ← if applicable
└── Docs/
├── FabricationNote.pdf
├── StackupDrawing.pdf
└── DrillChart.pdf
⚠ Never rename the ZIP file after creation: Include the board name and revision number in the folder name before compressing — for example, PCB_ControllerBoard_Rev1.2.zip. This avoids confusion when the manufacturer has multiple orders from different customers, and it makes version tracking unambiguous when you send a revised data package.
Gerber files define the geometry of the board. They cannot, by themselves, specify the material, copper weight, surface finish, IPC class, or electrical test requirements. A fabrication note (sometimes called a fab note or manufacturing specification) is a separate document — typically a PDF — that captures all manufacturing requirements not embedded in the Gerber files.
Without a fabrication note, the manufacturer fills in the blanks from defaults or best guesses. Those defaults may not match your requirements.
Board Identity
- Board name and drawing number
- Revision level
- Layer count
- Applicable IPC class (Class 2 or Class 3)
Material & Structure
- Base material (e.g. FR-4, Tg 150°C or 170°C)
- Laminate brand if specified (e.g. Shengyi S1000-2, Isola IS410)
- Finished board thickness and tolerance (e.g. 1.6mm ±10%)
- Copper weight per layer (e.g. 1 oz outer, 0.5 oz inner)
Minimum Feature Sizes
- Minimum trace width and spacing
- Minimum finished hole diameter (plated and non-plated)
- Minimum annular ring
- Blind/buried via layers (if applicable)
Surface & Finish
- Surface finish type (ENIG, HASL, OSP, Immersion Silver, etc.)
- Surface finish specification (e.g. ENIG: Ni ≥ 3µm, Au ≥ 0.05µm)
- Soldermask colour (Green, Black, White, Blue, Red)
- Silkscreen colour (White, Black, Yellow)
Board Outline & Delivery
- Outline method: routing or V-score (specify V-score angle and depth if used)
- Panel specification (if required)
- Quantity and acceptable number of defective boards per panel (if any)
Quality & Testing
- Electrical test: 100% flying probe or fixture (net-list-based)
- AOI (automated optical inspection): yes/no
- Impedance control requirements and target values (if applicable)
- Any special requirements: halogen-free, UL marking, RoHS compliance
One-time investment, reused every order: Create a standard fabrication note template for your most common board specification — for example, 4-layer FR-4 Tg150, 1.6mm, ENIG, green soldermask, 100% electrical test, IPC Class 2. For each new design, copy the template and adjust only what differs. This takes five minutes per order and eliminates almost all specification-related manufacturing errors.
Summary
Preparing Gerber data correctly means sending the complete file set with clear, descriptive filenames, verifying the data with a Gerber viewer before submission, organising files into a structured ZIP archive, and attaching a fabrication note that specifies everything the geometry files cannot. Building a standard checklist and folder template for your most common board type means you only have to do this work once — every subsequent order reuses the same structure with minor adjustments. The result is fewer back-and-forth corrections with the manufacturer, a faster transition from order to production, and a reduced chance of manufacturing errors caused by ambiguous specifications.