Standard FR-4 runs out of headroom above 1GHz. Designing and procuring PCBs for 5G, 77GHz automotive radar, and satellite communications requires different materials, tighter process controls, and manufacturers with specialized equipment. This guide covers material selection with real Dk/Df values, four critical design parameters, and procurement realities that are easy to overlook.
This guide covers: why FR-4 fails at high frequencies, three material tiers with actual Dk/Df specifications (PTFE, RO4000-series, low-loss FR-4), four design parameters that dominate high-frequency PCB performance (impedance control, stackup design, via treatment, surface finish), and the procurement realities that catch engineers off guard — manufacturer qualification, material lead times, and realistic cost benchmarks.
A PCB substrate affects signal quality through two electrical parameters: dielectric constant (Dk), which determines trace impedance and signal propagation velocity, and dissipation factor (Df, also called loss tangent), which determines how much signal energy is absorbed and converted to heat as the signal travels through the board. Standard FR-4 has a Dk around 4.4 and a Df around 0.020 — acceptable below 1GHz, but the Df creates unacceptable signal attenuation at higher frequencies. The three material tiers address this differently:
Transmission lines in high-frequency circuits must be controlled to a target impedance — 50Ω for single-ended RF, 100Ω differential for most high-speed serial interfaces. Impedance is determined by trace width, trace thickness, dielectric thickness, and substrate Dk — all of which are interrelated and vary across production lots. Specify your impedance target and tolerance in the fabrication drawing (±10% is standard; tighten to ±5% for mmWave). Require impedance test coupons on every production panel and TDR measurement of each panel or a statistical sample. Request the manufacturer's stackup calculation showing the dielectric and copper parameters used to achieve the target.
The stackup — layer order, copper weight per layer, and dielectric material and thickness between each pair of layers — directly determines impedance. For high-frequency designs, never let the manufacturer choose the stackup — design it explicitly or co-design it with the manufacturer using material datasheet Dk values. Use manufacturer simulation tools (Rogers MWI Calculator, Polar Si9000) to model impedance before ordering. For mixed RO4000/FR-4 multilayer designs, confirm that the prepreg bonding system between unlike materials is qualified by the manufacturer. Dielectric thickness tolerance is typically ±10% — factor this into your impedance tolerance budget.
Every via creates an impedance discontinuity — a capacitive stub that degrades signal quality at high frequencies. Three mitigation strategies apply: minimize via count on high-frequency signal paths; use backdrill (controlled-depth drilling) to remove unused via stub below the last signal connection — this is especially effective above 10GHz where stub resonance falls within the operating band; place return-path GND vias adjacent to every signal via to maintain a continuous current return path. For designs above 20GHz, via-in-pad (VIP) with resin fill and copper capping eliminates stub effects entirely for BGA and QFN fanout, at additional fabrication cost.
At high frequencies, the skin effect concentrates signal current at the conductor surface — making surface roughness and conductor layer composition critical. Avoid HASL for any high-frequency design: the irregular solder surface creates impedance variation and increased insertion loss. ENIG has a known issue for mmWave: the nickel layer (Dk ~600, poor conductivity) adds measurable insertion loss for designs above 20GHz. Immersion Silver provides the highest conductivity surface (silver is the highest-conductivity metal) and is increasingly preferred for mmWave designs. OSP is acceptable for designs with clean copper conductor surfaces and short shelf life requirements. ENIG remains the default for most Sub-10GHz applications where nickel-layer loss is not a binding constraint.
PTFE laminates require different drilling parameters, different routing speeds, and different surface preparation compared to FR-4. A manufacturer that offers "Rogers materials" without specialized experience may produce dimensionally correct boards that fail impedance and loss requirements. Verify: specific material experience (ask for production lot data, not just prototype examples), and that TDR and network analyzer are routine production instruments — not just available on special request.
High-frequency material properties vary more from lot to lot than standard FR-4 — and a prototype run may use material from a single lot while production orders span multiple lots. Request impedance coupon data from multiple production lots before freezing your qualification. Prototype approval alone is not sufficient evidence of production stability for high-frequency designs.
Rogers and Taconic specialty laminates are not commodity inventory items at most manufacturers. Non-standard thicknesses (e.g., 10mil core in RO4003C) can have lead times of 8–12 weeks from material order. For production programs, the PCB manufacturer needs to pre-order material — confirm availability and lead time at the RFQ stage, not after design freeze. Building a material buffer at the manufacturer for ongoing production is worth the carrying cost.
RO4000 series adds 3–6× cost over equivalent FR-4 boards; PTFE adds 8–15×. For a production program at volume, this is a meaningful line item. Before committing to a specialty laminate, run a loss budget calculation for your design at your operating frequency using the Df and Dk values for each candidate material. Quantify whether the performance improvement from the higher-tier material is actually required — many designs can move down one tier with minor layout changes that reduce path length or widen conductor cross-section.
Substrate Dk and Df values published in datasheets are often measured at 1MHz or 10GHz. Both parameters vary with frequency — Dk decreases and Df generally increases with frequency. For designs at 28GHz or 77GHz, use the material characterization data at or near your operating frequency, not the headline datasheet values. Rogers and Taconic provide S-parameter and dielectric property data across frequency for their materials — use it.
When combining RO4000 (or PTFE) layers with FR-4 layers in a multilayer stack, the prepreg bonding system must be compatible with both materials. Rogers offers dedicated bonding films (RO4450F, RO4450T) for this purpose. Confirm that your manufacturer uses a qualified bond ply system — incompatible materials can delaminate under thermal cycling. This is a qualification question to ask manufacturers explicitly, not something to assume from their general "multilayer PCB" capability.
High-frequency PCB procurement starts with material selection: low-loss FR-4 for Sub-6GHz/high-speed digital, RO4000 series for 5G infrastructure and automotive radar up to 28GHz, and PTFE for 77GHz and above. Four design parameters dominate performance — impedance control, stackup design, via treatment, and surface finish — all of which must be explicitly specified and verified, not left to manufacturer defaults. On the procurement side, the main risks are manufacturer qualification (not all can process specialty materials reliably), material lead time (plan for 6–12 weeks for non-standard grades), and cost validation (confirm the material tier is genuinely required before committing). Specifying Dk/Df at your actual operating frequency — not at 1MHz — and requiring TDR coupon data with every production lot are the two most effective quality controls for ongoing production.
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